PoC.misc.sync¶
The namespace PoC.misc.sync offers different clock-domain-crossing (CDC)
synchronizer circuits. All synchronizers are based on the basic 2 flip-flop
synchonizer called sync_Bits. PoC has two
platform specific implementations for Altera and Xilinx, which are choosen,
if the appropriate MY_DEVICE constant is configured in my_config.vhdl.
Decision Table:
| Behavior | Flag [1] | Strobe [2] | Continuous Data | Reset [4] | Pulse [3] |
|---|---|---|---|---|---|
| 1 Bit | sync_Bits | sync_Strobe | fifo_ic_got [5] | sync_Reset | sync_Pulse |
| n Bit | sync_Vector | sync_Command | fifo_ic_got [5] |
Basic 2 Flip-Flop Synchronizer
The basic 2 flip-flop synchronizer is called sync_Bits. It’s
possible to configure the bit count of indivital bits. If a vector shall be
synchronized, use one of the special synchronizers like sync_Vector. The
vendor specific implementations are named sync_Bits_Altera and
sync_Bits_Xilinx respectivily.
A second variant of the 2-FF synchronizer is called sync_Reset.
It’s for Reset-signals, implementing asynchronous assertion and synchronous
deassertion. The vendor specific implementations are named sync_Reset_Altera
and sync_Reset_Xilinx respectivily.
A third variant of a 2-FF synchronizer is called sync_Pulse.
It’s for very short Pulsed-signals. It uses an addition asynchronous capture FF to latch the
very short pulse. The vendor specific implementations are named sync_Pulse_Altera and
sync_Pulse_Xilinx respectivily.
Special Synchronizers
Based on the 2-FF synchronizer, several “high-level” synchronizers are build.
- sync_Strobe synchronizer
strobe-signals across clock-domain-boundaries. A busy signal indicates the synchronization status and can be used as a internal gate-signal to disallow new incoming strobes. Astrobe-signal is only for one clock period active. - sync_Command like
sync_Strobe, it synchronizes a one clock period active signal across the clock-domain-boundary, but the input has multiple bits. After the multi bit strobe (Command) was transfered, the output goes to its idle value. - sync_Vector synchronizes a complete vector across the clock-domain-boundary. A changed detection on the input vector causes a register to latch the current state. The changed event is transfered to the new clock-domain and triggers a register to store the latched content, but in the new clock domain.
See also
- PoC.fifo.ic_got
- For a cross-clock capable FIFO.
Footnotes
| [1] | A flag or status signal is a continuous, long time stable signal. |
| [2] | A strobe signal is active for only one cycle. |
| [3] | A pulse signal is a very short event. |
| [4] | To be refumented |
| [5] | (1, 2) See the PoC.fifo namespace for cross-clock capable FIFOs. |