PoC.xil.BSCAN

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This module wraps Xilinx “Boundary Scan” (JTAG) primitives in a generic module.
Supported devices are:

  • Spartan-3, Spartan-6
  • Virtex-5, Virtex-6
  • Series-7 (Artix-7, Kintex-7, Virtex-7, Zynq-7000)

Entity Declaration:

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entity xil_BSCAN is
  generic (
    JTAG_CHAIN          : natural;
    DISABLE_JTAG        : boolean     := FALSE
  );
  port (
    Reset               : out std_logic;
    RunTest             : out std_logic;
    Sel                 : out std_logic;
    Capture             : out std_logic;
    drck                : out std_logic;
    Shift               : out std_logic;
    Test_Clock          : out std_logic;
    Test_DataIn         : out std_logic;
    Test_DataOut        : in  std_logic;
    Test_ModeSelect     : out std_logic;
    Update              : out std_logic
  );
end entity;